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NTB125N02R, NTP125N02R
Power MOSFET
125 A, 24 V N?Channel
TO?220, D 2 PAK
Features
? Planar HD3e Process for Fast Switching Performance
? Body Diode for Low t rr and Q rr and Optimized for Synchronous
http://onsemi.com
?
?
?
?
Operation
Low C iss to Minimize Driver Loss
Optimized Q gd and R DS(on) for Shoot?through Protection
Low Gate Charge
Pb?Free Packages are Available
125 AMPERES, 24 VOLTS
R DS(on) = 3.7 m W (Typ)
D
MAXIMUM RATINGS (T J = 25 ° C Unless otherwise specified)
Parameter
Drain?to?Source Voltage
Gate?to?Source Voltage ? Continuous
Symbol
V DSS
V GS
Value
24
± 20
Unit
V dc
V dc
G
S
Thermal Resistance ? Junction?to?Case
Total Power Dissipation @ T C = 25 ° C
Drain Current ?
Continuous @ T C = 25 ° C, Chip
Continuous @ T C = 25 ° C, Limited by Package
Continuous @ T A = 25 ° C, Limited by Wires
Single Pulse (t p = 10 m s)
Thermal Resistance ?
Junction?to?Ambient (Note 1)
Total Power Dissipation @ T A = 25 ° C
Drain Current ? Continuous @ T A = 25 ° C
R q JC
P D
I D
I D
I D
I D
R q JA
P D
I D
1.1
113.6
125
120.5
95
250
46
2.72
18.6
° C/W
W
A
A
A
A
° C/W
W
A
4
TO?220AB
CASE 221A
STYLE 5
MARKING
DIAGRAMS
125N2RG
AYWW
Thermal Resistance ?
Junction?to?Ambient (Note 2)
Total Power Dissipation @ T A = 25 ° C
Drain Current ? Continuous @ T A = 25 ° C
R q JA
P D
I D
63
1.98
15.9
° C/W
W
A
1
2
3
Operating and Storage Temperature Range
T J , T stg
?55 to
° C
Single Pulse Drain?to?Source Avalanche
Energy ? Starting T J = 25 ° C
(V DD = 50 V dc , V GS = 10 V dc , I L = 15.5 A pk ,
L = 1 mH, R G = 25 W )
E AS
150
120
mJ
1
2
3
4
D 2 PAK
CASE 418AA
STYLE 2
125N2G
AYWW
Maximum Lead Temperature for Soldering
Purposes, 1/8 ″ from Case for 10 Seconds
T L
260
° C
125N2x
= Device Code
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using 1 inch pad size,
(Cu Area 1.127 in 2 ).
2. When surface mounted to an FR4 board using minimum recommended pad
size, (Cu Area 0.412 in 2 ).
x
A
Y
WW
G
=R
= Assembly Location
= Year
= Work Week
= Pb?Free Package
PIN ASSIGNMENT
ORDERING INFORMATION
PIN
1
2
3
4
FUNCTION
Gate
Drain
Source
Drain
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
? Semiconductor Components Industries, LLC, 2006
April, 2006 ? Rev. 7
1
Publication Order Number:
NTB125N02R/D
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